ASQED 2011 Program
SESSION 1A
Tuesday, July 19, 2011
1:30PM-2:50PM
Advanced Packaging and Signal Integrity
Chair: Farhang Yazdani, BroadPak Corporation
1:30PM
1A.1
Thermal Modeling of Three-Dimensional Integrated Circuits Considering the Thermal Removal Capability of Different TSVs
Hua Ding1, Wei Wang1, Zhiliang Qian1, Chiying Tsui1, Liangzhen Lai2
1Hong kong university of science and technology, 2University of California, Los Angeles
1:50PM
1A.2
Package Design Optimization for Efficient On-Chip Capacitance Leveraging
Fern Nee Tan1, Sheng Chyan Lee2, Abdul Rahman Faidz2
1Intel Microelectronics, 2Universiti Tunku Abdul Rahman
2:10PM
1A.3
Signal Integrity and Scalability Study of a Novel PoP Inter-Package System
Jackson Kong, Bok Eng Cheah, Shanggar Periaman, Kooi Chi Ooi
Intel Malaysia
2:30PM
1A.4
Influence of the Heat Sink Orientation and Fins Arrangement on the Thermal Behavior of High Power LED
Teeba Nadarajah, Anithambigai Permal, Dinash Kandasamy, Mutharasu Devarajan
Nano Opto Electronics Lab (NOR), School of Physics, Universiti Sains Malaysia (USM), 11800 Minden, Penang, Malaysia
SESSION 1B
Tuesday, July 19, 2011
1:30PM-2:50PM
Advances in Analog IC Design
Chair: Volkan Kursun, Hong Kong University of Science and Technology
1:30PM
1B.1
An Automatic Phase Control Circuit with DLL-like Architecture for Phased Array Antenna Systems
Toshiyuki Kikkawa, Toru Nakura, Kunihiro Asada
The University of Tokyo
1:50PM
1B.2
NBTI-induced 8-Bit DAC circuit mismatch in System-On-Chip (SoC)
Mohd Azman Abdul Latif1, Dr Noohul Basheer Zain Ali2, Dr Fawnizu Azmadi Hussin2
1Intel Corporation, 2University of Technology PETRONAS
2:10PM
1B.3
A 3.1-10.6 GHz Frequency Tunable Ultra Wideband LNA
Guo-Ming Sung, Chia-Yu Hsu, Chiu-Lung Shen
National Taipei University of Technology
2:30PM
1B.4
On-Chip 1.8 V Step Down DC/DC Converter with 94% Power Efficiency
Prajakta Panse and Laxminidhi Tonse
National Institute of Technology Karnataka
SESSION 1C
Tuesday, July 19, 2011
1:30PM-2:30PM
Low-Cost and Efficient Testing
Chair: Chin Hai Ang, Altera Corporation
1:30PM
1C.1
A Complete methodology for determining memory BIST optimization under wrappers sharing constraints
Lilia Zaourar1, Yann Kieffer2, Arnaud Wenzel3
1Laboratoire LIP6 deprt. SOC, 2Laboratoire G-SCOP, 3STMicroelectronics
1:50PM
1C.2
Build-In-Self-Test of FPGA For Diagnosis of Delay Fault
Nachiketa Das1, Pranab Roy1, Hafizur Rahaman1, Parthasarathi Dasgupta2
1Bengal Engg. & Sc University, Shibpur, 2IIM-Calcutta
2:10PM
1C.3
Outlier Distribution Detection Approach to Semiconductor Wafer Fabrication Process Monitoring
Huiyuan Cheng1, Melanie Po-Leen Ooi1, Ye Chow Kuang1, Serge Demidenko2, Bryan Cheah3
1Monash University, 2RMIT International University, 3Freescale Semiconductor
SESSION 2A
Tuesday, July 19, 2011
3:30PM-4:30PM
High Performance Memory and Logic Circuits
Chair: Young Hwan Kim, Pohang University of Science and Technology
3:30PM
2A.1
Application-Specific Selection of 6T SRAM Cells Offering Superior Performance and Quality with a Triple-Threshold-Voltage CMOS Technology
Hong Zhu and Volkan Kursun
Hong Kong University of Science and Technology
3:50PM
2A.2
Near-Threshold 40nm Supply Feedback C-Element
Idan Schwartz1, Adam Teman1, Rostislav (Reuven) Dobkin2, Alexander Fish1
1Low Power Circuits & Systems Lab, The VLSI Systems Center, Ben-Gurion University of The Negev, 2vSync Circuits Ltd
4:10PM
2A.3
A White LED Backlight Driving IC with 3-Bit Dimming Controller
Guo-Ming Sung, Sheng-Kai Peng, Yen-Tang Chang
National Taipei University of Technology
SESSION 2B
Tuesday, July 19, 2011
3:30PM-4:30PM
MEMS and Biochips
Chair: Zhiyong Fan, Hong Kong University of Science and Technology
Co-Chair: Johnny C. Ho, City University of Hong Kong
3:30PM
2B.1
Routing-Aware Placement Technique for Intelligent Collision Avoidance in Digital Microfluidic Biochips
Pranab Roy1, Hafizur Rahaman1, Parthasarathi Dasgupta2
1Bengal Engineering and Science University,Shibpur,INDIA, 2Indian Institute of Management,Calcutta,INDIA
3:50PM
2B.2
Comparison of Isotropic Dry Etching Process using XeF2 and Anisotropic Wet Etching Process using EDP for Microhotplate Device
Zarina Tardan1 and Dr Zaini Abdul Halim2
1USM, 2CEDEC, USM
4:10PM
2B.3
Effect of Heater Geometry on the High Temperature Distribution on a MEMS Micro-hotplate
Othman Sidek1, Mohammad Zulfikar Ishak1, Muhammad Afif Khalid1, Mohamad Zailani Abu Bakar2, Muhamad Azman Miskam1
1Collaborative Microelectronic Design Excellence Centre, 2School of Chemical Engineering
SESSION 2C
Tuesday, July 19, 2011
3:30PM-4:50PM
On-Chip Interconnects and Communication
Chair: Farhad Mehdipour, Kyushu University
3:30PM
2C.1 - Invited Paper
Display Signal Interface Techniques for Mobile Applications
Kyoungrok Cho1, Sang-Jin Lee1, Seok-Man Kim1, Doo-Hwan Kim2
1Dept. of Computer and Communication Eng. Chungbuk Nat’l Univ., Korea, 2SYS.LSI Division, Samsung Electronics Co., Ltd, Korea
3:50PM
2C.2
Power-Reliability Tradeoff in Low Power 4-PAM Signaling in On-chip Communication
Arash Abtahi Forooshani1, Fakhrul Zaman Rokhani2, Khairulmizam Samsudin1, Hamid Behzadipour3
1university putra malaysia, 2university putra malaysia, Intel Microelectronics, 3Ansari GmBH
4:10PM
2C.3
A New Statistical Electromigration Analysis Methodology that Incorporates Across-Chip Temperature Variation
ted sun, ayhan mutlu, mahmud rahman
santa clara university
4:30PM
2C.4
A Fully On-Chip Throughput Measurement System for Multi-Gigabits/s On-Chip Interconnects
Amit Vishnani, Marshnil Dave, Maryam Baghini, Dinesh Sharma
IIT Bombay
SESSION 1P
Tuesday, July 19, 2011
5:00PM-6:30PM
Poster
Chair: Volkan Kursun, Hong Kong University of Science and Technology
1P.1
NBTI Degradation with Optimized ID-VG Sweep for Wafer Fabrication Monitoring
Foo Yew Soon and Norhayati Soin
University of Malaya
1P.2
0.18um Low Voltage 12-Bit Successive-Approximation-Register Analog-to-Digital Converter (SAR ADC)
Mei Yee Ng
MIMOS Berhad
1P.3
Linearization of GaN Power Amplifier Using Feedforward and Predistortion Techniques
Muhammad Abuelma'atti
King Fahd University of Petroleum and Minerals
1P.4
A New Functional Model For Wireless Communication Class-AB Solid-State Bipolar Power Amplifiers
Muhammad Abuelma'atti
King Fahd University of Petroleum and Minerals
1P.5
The Development of an Enhancement-Mode Single-Transistor SONOS Cell in 0.13µm Technology
Dony Kaba, Alexander Tan, Boon Jiew Chee, Sewoon Seok
X-FAB Sarawak Sdn. Bhd.
1P.6
A New Architecture for T Flip Flop using Quantum-Dot Cellular Automata
Mohammad Torabi
Malayer University
1P.7
Multi-Stage Parallel Processing of Design Element Access Tasks in FPGA-based Logic Emulation Systems
Somnath Banerjee and Tushar Gupta
Mentor Graphics Pvt. Ltd., India
1P.8
Study on the Variation in Thermal Resistance and Junction Temperature of GaN based LEDs Using Thermal Transient Measurement
Teeba Nadarajah, Kean Yew Lee, Chin Keng Lee, Anithambigai Permal, Dinash Kandasamy, Mutharasu Devarajan
Nano Opto Electronics Lab (NOR), School of Physics, Universiti Sains Malaysia (USM)
SESSION 3A
Wednesday, July 20, 2011
1:30PM-2:50PM
Statistical Timing and Leakage Analysis
Chair: Amine Bermak, Hong Kong University of Science and Technology
Co-Chair: Farhad Mehdipour, Kyushu University
1:30PM
3A.1
Timing Yield Slack for Statistical Optimization
Eun Ju Hwang1, Wook Kim2, Young Hwan Kim1
1Pohang University of Science and Technology, 2Samsung Electronics
1:50PM
3A.2
Assessment of Nano-scale Asynchronous PCFB Circuits under Extreme Process Variation
Mohsen Raji, Behnam Ghavami, Hamid R. Zarandi, Hossein Pedram
Amirkabir University of Technology
2:10PM
3A.3
A Prediction Model For Estimating Leakage Power Consumption of Routing Resources in FPGAs
Behzad Salami and Morteza Saheb Zamani
Department of Computer Engineering and IT, Amirkabir University of Technology
2:30PM
3A.4
Statistical Leakage Analysis by Parallel Monte-Carlo Programming on a CUDA Platform
Jungil Ahn, Jinwook Kim, Young Hwan Kim
POSTECH
SESSION 3B
Wednesday, July 20, 2011
1:30PM-2:50PM
Noise Analysis and Characterization
Chair: Volkan Kursun, Hong Kong University of Science and Technology
Co-Chair: Hisayo S. Momose, Toshiba Corporation
1:30PM
3B.1
A Novel and Fast Method for Characterizing Noise Based PCMOS Circuits
Anshul Singh1, Satyam Mandavalli2, Vincent Mooney III3, Keck-Voon Ling4
1International Institute of Information Technology, Hyderabad, India, 2International Institute of Information Techonology, Hyderabad , India, 3Georgia Institute of Technology, USA, 4Nanyang Technological University, Singapore
1:50PM
3B.2
Finding the Worst Case Supply Noise Excitation Methodology for High Speed I/O Interfaces
Fern Nee Tan1, Sheng Chyan Lee2, Faidz Abdul Rahman2
1Intel Microelectronics, 2Universiti Tunku Abdul Rahman
2:10PM
3B.3
Reliability Analysis of Digital Circuits Considering Intrinsic Noise
Veit B. Kleeberger and Ulf Schlichtmann
Technische Universitaet Muenchen
2:30PM
3B.4
IR Drop Analysis in Single- and Multi-Wall Carbon Nanotube Power Interconnects in Sub-Nanometer Designs
Debaprasad Das and Hafizur Rahaman
Bengal Engineering and Science University, Shibpur
SESSION 3C
Wednesday, July 20, 2011
1:30PM-2:30PM
Fault Detection and Correction
Chair: Cha-Keon Cheong, Hoseo University
Co-Chair: Chin Hai Ang, Altera Corporation
1:30PM
3C.1
Detectability Analysis for Resistive Open Faults with Dynamic Supply Voltage Scaling Awareness
Mohamed Tagelsir Mohammadat1, Noohul Basheer Zain Ali2, Fawnizu Azmadi Hussin2
1Student, 2Lecturer
1:50PM
3C.2
Low Power Self-Checking Two-Rail Code Checker Design
Shao-Hui Shieh
Department of Electronic Engineering, National Chin-Yi University of Technology, Taiwan, ROC
2:10PM
3C.3
A Symbolic Model-Based Diagnosis with Auto-correction Framework for Arithmetic Circuits
Bijan Alizadeh
University of Tehran
SESSION 4A
Wednesday, July 20, 2011
3:30PM-5:10PM
Nanoelectronic Devices and Circuits
Chair: Hyunhyub Ko, Ulsan National Institute of Science and Technology
Co-Chair: Johnny C. Ho, City University of Hong Kong
3:30PM
4A.1
Random Work Functions Induced DC and Dynamic Characteristic Fluctuations in 16-nm High-k/Metal Gate CMOS Device and Digital Circuit
Hui-Wen Cheng and Yiming Li
National Chiao Tung University
3:50PM
4A.2
Enhanced Synthesis Method to Prepare Crystalline GaAs Nanowires with High Growth Yield
Ning Han1, Fengyun Wang2, Alvin T. Hui2, Jared J. Hou2, Guangcun Shan2, Fei Xiu2, Tak Fu. Hung2, Johnny C. Ho1
1Department of Physics and Materials Science, City University of Hong Kong, 83 Tat Chee Ave., H.K. SAR, China., 2
4:10PM
4A.3
Uniform Diameter and Pitch Co-Design of 16nm N-type Carbon Nanotube Channel Arrays for VLSI
Yanan Sun and Volkan Kursun
The Hong Kong University of Science and Technology
4:30PM
4A.4
Simulation Study of Open Circuit Voltage Loss at Schottky Top contact in Ultra-Shallow Junction Silicon Solar Cells
Miao YU1 and Zhiyong FAN2
1Hong Kong University of ScNience & Technology, 2Hong Kong University of Science & Technology
4:50PM
4A.5
Optimization of Arsenic and Phosphorus Source/Drain Implantation for low power NMOS Device
Qiang Ai, Jerry Foo Sen Liew, Wilson Entalai, Eui Choong Kim
X-FAB Sarawak
SESSION 4B
Wednesday, July 20, 2011
3:30PM-5:10PM
Advanced VLSI Architectures and Applications
Chair: Young Hwan Kim, Pohang University of Science and Technology
3:30PM
4B.1
Memory Reduction of IFFT Using Separated CIM(Combined Integer Mapping) Method
In-Gul Jang and Jin-Gyun Chung
Chonbuk National University
3:50PM
4B.2
HARDWARE AND SOFTWARE REQUIREMENTS FOR IMPLEMENTING A HIGH-PERFORMANCE SUPERCONDUCTIVITY CIRCUITS-BASED ACCELERATOR
Farhad Mehdipour, Hiroaki Honda, Koji Inoue, Kazuaki Murakami
Kyushu University
4:10PM
4B.3
Interpolation Circuit Design for XRF Systems Using FFT
Zhe-Yan Piao, Won-Suk Song, In-Gul Jang, Jin-Gyun Chung
Chonbuk National University
4:30PM
4B.4
An Approach to Code Compression for CGRA
Seongsik Park and Kiyoung Choi
School of Electrical Engineering and Compuer Science, Seoul National University
4:50PM
4B.5
Analysis, Modeling and Optimization of Transmission Gate Delay
Hafizur Rahaman, Sabir Ali Mondal, Somsubhra Talapatra Talapatra
Bengal Engg. & Sc. University,Shibpur
SESSION 4C
Wednesday, July 20, 2011
3:30PM-4:50PM
Sensors and Displays
Chair: Kyoungrok Cho, Chungbuk National University
Co-Chair: Hisayo S. Momose, Toshiba Corporation
3:30PM
4C.1
VPIC-based Image Compression Technique for Sensor Network Applications
Yan WANG1, Amine BERMAK1, Farid BOUSSAID2
1Hong Kong University of Science and Technology, 2University of Western Australia
3:50PM
4C.2
Robust Gas Recognition using Adaptive Thresholding
Jaber Hassan J Al Yamani1, Farid Boussaid1, Amine Bermak2
1The University of Western Australia, 2Hong Kong University of Science and Technology
4:10PM
4C.3
A Novel Integrated Amorphous Silicon TFT Gate Driver Circuit with Optimized Design for TFT-LCD Display Panel Manufacturing
I-Hsiu Lo, Hui-Wen Cheng, Yiming Li, Po-Jui Lin, Cheng-Han Shen
National Chiao Tung University
4:30PM
4C.4
Design of Lane Detection System Based on Color Classification and Edge Clustering
Cha-Keon Cheong
Hoseo University
