Mohsen Raji, Behnam Ghavami, Hamid R. Zarandi, Hossein Pedram
Amirkabir University of Technology
Quasi-Delay-Insensitive (QDI) asynchronous circuit are known as a category of asynchronous circuits that are intrinsically robust toward timing variation. QDI circuit can be sound engineered using template-based design methodology and only under isochronic fork timing assumptions. Hence, generation and verification of these timing constraints are necessary steps in practical designs of QDI circuits in nano-scale era under large process variability. This paper presents an evaluation of how timing variation impacts the functionality of template-based QDI asynchronous circuits. We model a generic structure of a QDI template called PCFB using the signal transition graph specification and using a lemma to detect the isochronic forks candidate. Extensive quantitative analysis is exploited to justify the isochronic forks among the obtained candidate forks. Experimental results show that QDI asynchronous templates have extreme robustness property in the variable environments.