Mohamed Tagelsir Mohammadat1, Noohul Basheer Zain Ali2, Fawnizu Azmadi Hussin2
1Student, 2Lecturer
Dynamic supply voltage and frequency scaling (DVFS) is efficient and practical design technique to reduce power consumption in VLSI devices. Due to the multiple voltage op- erating environment and the supply voltage dependent behavior of physical faults, obtaining a minimal test set which gives best fault coverage is challenging. Researchers showed that testing of resistive opens is best achieved at elevated supply voltage, however based on experimental results on ISCAS-85 circuits it is shown that is not always the case for DVFS designs. This paper analyzes and identifies different detectability pattern for resistive open in such designs. Additionally it discusses the multi- Vdd testing and its impact on fault coverage.