ASQED 2013 Program, Rev. 6

SESSION 1A

Tuesday, Aug. 27, 2013

1:30PM-3:00PM

Analog Circuits

Chair: Edward Ho, Qualcomm

1:30PM
1A.1
A Wideband Multi-Stage Inverter-Based Driver Amplifier for IEEE 802.22 WRAN Transmitters
Geng-Zhen Qi, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins
University of Macau

1:50PM
1A.2
A 128-phase Delay-Locked Loop with Cyclic VCDL
Chien-Hung Kuo and Yu-Chieh Ma
National Taiwan Normal University

2:10PM
1A.3
A Fast Transient Response Synchronous Buck Converter with Modified Ripple-Based Control (MRBC) Technique
Yunwu Zhang, Jing Zhu, Weifeng Sun, Yangbo Yi
Southeast University

2:30PM
1A.4
Ultra Low-Supply Voltage Reference Generator with Low Sensitivity to PVT Variations
Hande Vinayak Gopal¹, Prafful Gupta², Maryam Shojaei Baghini¹
¹IIT Bombay, ²IIT Rajasthan

SESSION 1B

Tuesday, Aug. 27, 2013

1:30PM-3:00PM

Test & Design for Test

Chair: Otmane Ait Mohamed, Concordia University

1:30PM
1B.1
Detecting Resistive-Opens in RRAM using Programmable DfT Scheme
Nor Zaidi Haron¹, Norsuhaidah Arshad¹, Sukreen Hana Herman²
¹Universiti Teknikal Malaysia Melaka, ²Universiti Teknologi MARA

1:50PM
1B.2
A Coverage Driven Test Generation Methodology Using Consistency Algorithm
Jomu George Mani Paret and Otmane Ait Mohamed
Concordia University

2:10PM
1B.3
Improved Test Methodology for Multi-Clock Domain SoC ATPG Testing
Ee Mei Ooi and Chin Hai Ang
Altera Corporation (M) Sdn Bhd

2:30PM
1B.4
On Using IEEE 1500 Standard for Functional Testing
Ghazanfar Ali, Fawnizu Azmadi Hussin, Noohul Basheer Zain Ali, Nor Hisham Hamid
Universiti Teknologi Petronas

SESSION 1C

Tuesday, Aug. 27, 2013

1:30PM-3:00PM

Sensors & Nanoelectronics

Chair: Ramgopal Rao, IIT Bombay

3:30PM
1C.1
Ultra-sensitive Polymeric Sensor Platforms for Environmental Sensing Applications
Prasenjit Ray, Harshil Raval, V. Ramgopal Rao
IIT Bombay

3:50PM
1C.2
A Low Power Oscillator Based Temperature Sensor for RFID Applications.
Saqib Mohamad¹, Fang Tang², Abbes Amira³, Amine Bermak², Mohieddine Benammar⁴
¹HKUST/ Qatar University, ²HKUST, ³University of West of Scotland, ⁴Qatar University

4:10PM
1C.3
Design and Simulation of Clamped-Clamped and Clamped-Free Resonators
Ahmad Anwar Zainuddin¹, Jamilah Karim², Anis Nurashikin Nordin², Mohanraj Soundara Pandian¹, Sheroz Khan²
¹Silterra, ²IIUM

4:30PM
1C.4
On Testing of MEDA Based Digital Microfluidics Biochips
Vineeta Shukla¹, Noohul Basheer Zain Ali¹, Fawnizu Azmadi Hussin¹, Mark Zwolinski²
¹Universiti Teknologi Petronas, Malaysia, ²University of Southampton, UK

SESSION 2A

Tuesday, Aug. 27, 2013

3:30PM-5:00PM

Digital VLSI

Chair: Arun Chandorkar, IIT Bombay

3:30PM
2A.1
Applications of Crystalline Indium-Gallium-Zinc-Oxide Technology to LSI: Memory, Processor, Image Sensor, and Field Programmable Gate Array (Invited)
Yoshiyuki Kurokawa¹, Yuki Okamoto¹, Takashi Nakagawa¹, Takeshi Aoki¹, Masataka Ikeda¹, Munehiro Kozuma¹, Takeshi Osada¹, Takayuki Ikeda¹, Naoto Yamade¹, Yutaka Okazaki¹, Hidekazu Miyairi¹, Masahiro Fujita², Jun Koyama¹, Shunpei Yamazaki¹
¹Semiconductor Energy Laboratory Co., Ltd., ²VLSI Design and Education Center (VDEC), University of Tokyo

3:50PM
2A.2
Totally Self-Checking (TSC) VLSI Circuits using Scalable Error Detection Coding (SEDC) Technique
Natarajan Somasundaram¹, Farhad Mehdipour², Jeong-A Lee³, Narayanadass Ramadass⁴, Y V Ramana Rao⁴
¹SSM College of Engineering, ²Kyushu University, ³Chosun University, ⁴Anna University

4:10PM
2A.3
A Robust and Energy Efficient Pulse Generator for Ultra-Wide Voltage Range Operations
Sébastien Bernard¹, David Bol², Alexandre Valentian³, Marc Belleville³, Jean-Didier Legat²
¹CEA-LETI/ICTEAM-UCL, ²ICTEAM-UCL, ³CEA-LETI

SESSION 2B

Tuesday, Aug. 27, 2013

3:30PM-5:00PM

Design Solutions

Chair: Zhou Hongxia, Hong Kong Polytechnic University

3:30PM
2B.1
High-Quality Data Assignment to Hierarchical Memory Organizations for Multidimensional Signal Processing
Florin Balasa¹, Ilie I. Luican², Doru V. Nasui³
¹American University in Cairo, Egypt, ²Microsoft Inc., USA, ³American International Radio Inc., USA

3:50PM
2B.2
Congestion-Oriented Approach in Placement for Analog and Mixed-Signal Circuits
Hongxia Zhou¹, Chiu-Wing Sham¹, Hailong Yao²
¹The Hong Kong Polytechnic University, ²Tsinghua University

4:10PM
2B.3
Tunable Stochastic Computing using Layered Synthesis and Temperature Adaptive Voltage Scaling
Neel Gala¹, VR Devanathan², Vish Visvanathan², Virat Gandhi¹, Veezhinathan Kamakoti¹
¹IIT-Madras, ²Texas Instruments, India

4:30PM
2B.4
Rapid Search of Pareto Fronts using D-logic Exploration during Multi-Objective Tradeoff of Computation Intensive Applications
Anirban Sengupta¹, Vipul Kumar Mishra¹, Pallabi Sarkar²
¹Indian Institute of Technology Indore, ²Vellore Institute of Technology Chennai

SESSION 2C

Tuesday, Aug. 27, 2013

3:30PM-5:00PM

Advanced Packaging: Signal Integrity & 3D Technologies

Chair: Paul D. Franzon, North Carolina State University

1:30PM
2C.1
A New TSV Set Architecture for High Reliability
Jaeseok Park and Sungho Kang
Department of Electrical and Electronic Engineering, Yonsei University

1:50PM
2C.2
Heterogeneous Stacking of 3D MPSoC Architecture: Physical Implementation Analysis and Performance Evaluation
Mohamad Hairol Jabbar¹, Dominique Houzet², Omar Hammami³
¹Department of Computer Engineering, FKEE, UTHM, Johor, Malaysia, ²GIPSA-Lab, France, ³ENSTA PARISTECH, France

2:10PM
2C.3
Port Assignment for Multiplexer and Interconnection Optimization
Cong Hao¹, Hao-Ran Zhang², Song Chen³, Takeshi Yoshimura², Min-You Wu¹
¹Shanghai Jiao Tong University, ²Waseda University, ³University of Science and Technology of China

2:30PM
2C.4
Full System Power Delivery Analysis for Single Ended Interface
Heng Chuan Shu, Bok Eng Cheah, Jackson Kong, Sze Geat Pang, Li Chuang Quek
Intel Microelectronics (M) Sdn. Bhd.

SESSION P

Tuesday, Aug. 27, 2013

11:45AM-12:30PM

Poster Papers

Chair: tbd, tbd

P.1
External Loopback Testing on High Speed Serial Interface
Shen Shen Lee
ALTERA

P.2
Repairing of Faulty TSVs using Available Number of Multiplexers in 3D ICs
Surajit Kumar Roy, Sobitri Chatterjee, Chandan Giri, Hafizur Rahaman
Bengal Engineering and Science University

P.3
Innovative Solutions for Package on Package Test
Chin Chien Tee and Siang Soh
Interconnect Devices, Inc

P.4
Simulation and Modeling of Heat-Dissipation Packaging for Nanoscale GaInP/GaAs Collector-Up HBTs
Jhin-Fong-Chin Chang and Hsien-Cheng Tseng
Kun Shan University

P.5
Methods of Optimized Via Design for Higher Channel Bandwidth
Chang Fei Yee
Agilent Technologies

P.6
Breakthrough of Micro USB Placement in Printed Circuit Board
Kent Lee, Huoy Thyng Yow, Oliver Hooi
Motorola Solutions

P.7
Variability Aware Performance Evaluation of Low Power SRAM Cell
Hansel Dsilva, Julian Pinto, Arzan Elchidana, Sudhakar Mande
Department of Electronics and Telecommunication, Don Bosco Institute of Technology, Mumbai University, India.

P.8
Distortion Analysis and Calculation of Wide-band Track and Hold Amplifier
Hailang Liang¹, Jin He¹, Rob.J. Evans², Efstratios Skafidas², Cheng Wang¹, Qingxing He³, Caixia Du³, Shengju Zhong³
¹Peking University, ²University of Melbourne, ³Shenzhen Huayue Terascale Chip Co. LTD.

P.9
Multiobjective Evolutionary Approach to Silicon Solar Cell Design Optimization
Wen-Tsung Huang, Chieh-Yang Chen, Yu-Yu Chen, Sheng-Chia Hsu, Yiming Li
National Chiao Tung University

P.10
An Electrical Study of Differential Clock Die-to-Die Interconnection in Multi-chip Packages
Tang Min Keen and Tan Wei Jern
Intel Microelectronics

P.11
Cluster-Based Thermal-Aware 3D-Floorplanning Technique with Post-Floorplan TTSV Insertion at Via-Channels
Chia-Chen Wen, Ying-Jung Chen, Shanq-Jang Ruan
National Taiwan University of Science and Technology

P.12
Oscillation Built-in-Self-Test for ADC Linearity Testing in Deep Submicron CMOS Technology
Koay Soon Chan¹, Nuzrul Fahmi¹, Kim Chon Chan¹, Terk Zyou Lok¹, Chee Wai Yong¹, Adam Osseiran²
¹Marvell Semiconductor Sdn. Bhd., ²Edith Cowan University

SESSION 3A

Wednesday, Aug. 28, 2013

1:30PM-3:00PM

ADC and Memory Readout

Chair: Kim Tae Hyoung, Nanyang Technological University

1:30PM
3A.1
A 2.93μW 8-Bit Capacitance-to-RF Converter for Movable Laboratory Mice Blood Pressure Monitoring
Ka-Meng Lei, Pui-In Mak, Man-Kay Law, R. P. Martins
University of Macau

1:50PM
3A.2
A 1.8 V 64.9 uW 54.1 dB SNDR 1st Order Sigma-Delta Modulator Design Using Clocked Comparator Based Switched Capacitor Technique
Sourav Chakraborty, Manodipan Sahoo, Hafizur Rahaman
Bengal Engineering and Science University, Shibpur

2:10PM
3A.3
Highly Robust and Sensitive Charge Transfer Sense Amplifier for Ultra-Low Voltage DRAMs
Choongkeun Lee and Hongil Yoon
Department of Electrical and Electronic Engineering, Yonsei University

2:30PM
3A.4
Digitally Controlled Variation Tolerant Timing Generation Technique for SRAM Sense Amplifiers
Viveka K R and Bharadwaj Amrutur
ECE, IISc Bangalore

SESSION 3B

Wednesday, Aug. 28, 2013

1:30PM-3:00PM

3D Design Solutions

Chair: Abbes Amira, University of West of Scotland

1:30PM
3B.1
Implementation of a Physical Unclonable Function (PUF) with Transmission Line Crosstalk in a Chip (Invited)
Kyoungrok Cho, Kwan-Hee Lee, Seung-Yul Kim, Sang-Jin Lee, Younggap You
Chungbuk National University

1:50PM
3B.2
Simultaneous Hotspot Temperature and Supply Noise Reductions using Thermal TSVs and Decoupling Capacitors
Yan-Wun Wang, Pao-Jen Huang, Tai-Chen Chen, Chien-Nan Jimmy Liu
National Central University

2:10PM
3B.3
Exploration of 2D EDA Tool Impact on the 3D MPSoC Architectures Performance
Mohamad Hairol Jabbar¹, Abir Mzah², Omar Hammami², Dominique Houzet³
¹Department of Computer Engineering, FKEE, UTHM, Johor, Malaysia, ²ENSTA PARISTECH, France, ³GIPSA-Lab, France

2:30PM
3B.4
Path Resistance Reduction through Automated Multi-Level Metal and Via Insertion for IC Layout Design
Thai Lee Lo, Gregory Sylvester Emmanuel, Thomas Fong Chee Goh, Chun Keong Lee, Joon Heong Ong, Yng Chuk Tam, Jonathan Yoong-Seang Ong, Hui Peng Ong
Spansion Penang Sdn Bhd

SESSION 3C

Wednesday, Aug. 28, 2013

1:30PM-3:00PM

Advanced Device Topics

Chair: Kyoungrok Cho, Chungbuk National University

1:30PM
3C.1
An ABCD Parameter-based Modeling and Analysis of Crosstalk Induced Effects in Single-Walled Carbon Nanotube Bundle Interconnects
Manodipan Sahoo, Prasun Ghosal, Hafizur Rahaman
Bengal Engineering and Science University, Shibpur

2:10PM
3C.3
The Effects of Elliptical Gate Cross Section on Carbon Nanotube Gate-All-Around Field Effect Transistor
Hao Wang¹, Sheng Chang¹, Cheng Wang¹, Yue Hu¹, Hongyu He¹, Jin He¹, Qingxing He², Caixia Du², Shengju Zhong²
¹Peking University, ²Shenzhen Huayue Terascale Chip LTD.Co.

2:30PM
3C.4
Study on Silicon Window Polarity of Partial-SOI LDMOS Power Devices
Yue Hu¹, Hao Wang¹, Cheng Wang¹, Jin He¹, Xiaoan Zhu¹, Sheng Chang², Qijun Huang², Dewen Wang³, Qingxing He⁴, Caixia Du⁴, Shengju Zhong⁴
¹Peking University, ²Wuhan University, ³Shenzhen SI Semiconductors, ⁴Shenzhen Huayue Terascale Chip

SESSION 4A

Wednesday, Aug. 28, 2013

3:30PM-5:00PM

Special Topics in Circuit and System Design

Chair: Abbes Amira, University of West of Scotland

3:30PM
4A.1
A Low-Power Circuit Architecture for Transistor Electrical Overstress (EOS) Protection
Chee Hong Aw
Intel Microelectronics (M) Sdn. Bhd.

3:50PM
4A.2
Computationally Efficient Methodology for Statistical Characterization and Yield Estimation due to Inter and Intra-die Process Variations
Sudhakar Mande¹, Arun Chandorkar², Hiroshi Iwai³
¹Don Bosco Institute of Technology, Kurla, ²Indian Institute of Technology, Powai, ³Tokyo Institute of Technology

4:10PM
4A.3
On Improving at No Cost the Quality of Products Built with SRAM-based FPGAs
Regis Leveugle and Mohamed Ben Jrad
Grenoble Institute of Technology / TIMA

SESSION 4B

Wednesday, Aug. 28, 2013

3:30PM-5:00PM

Test & Verification

Chair: Chin Hai Ang, Altera Corporation (M) Sdn Bhd

3:30PM
4B.1
Mu-GSIM: A Mutation Testing Simulator on GPUs
Jason Tong¹, Marc Boulé², Zeljko Zilic¹
¹McGill University, ²École de Technologie Supérieure

3:50PM
4B.2
Logic Emulation with Forced Assertions: A Methodology for Rapid Functional Verification and Debug
Somnath Banerjee, Tushar Gupta, Sanjay Gupta
Mentor Graphics Pvt. Ltd.

4:10PM
4B.3
Online Error Detection in SRAM based FPGAs using Scalable Error Detection Coding
Zahid Ali Siddiqui and Jeong-A Lee
Chosun University

4:30PM
4B.4
An Efficient Metric for Detecting Timing Failure Region Due to Crosstalk Noise
Hyoeon Yang and Young Hwan Kim
POSTECH

SESSION 4C

Wednesday, Aug. 28, 2013

3:30PM-5:00PM

Advanced Packaging: Thermal Integrity & Process Technologies

Chair: Bok Eng Cheah, Intel

3:30PM
4C.1
Influence of Phosphor Packaging Configurations on the Optical Performance of Chip on Board Phosphor Converted Warm White LEDs
Peng Hui Yuen, Hwang Hsien Hsiung, Mutharasu Devarajan
Universiti Sains Malaysia

3:50PM
4C.2
Thermal Simulation Analysis of High Power LED System using Two-Resistor Compact LED Model
Zeng Yin Ong, Shamugan Subramani, Mutharasu Devarajan
Universiti Sains Malaysia

4:10PM
4C.3
Heat Transfer in High-Power LED with Thermally Conductive Particles-Filled Epoxy Composite as Thermal Interface Material for System-Level Analysis
Permal Anithambigai, Subramani Shanmugan, Devarajan Mutharasu, Kamarulazizi Ibrahim
Universiti Sains Malaysia (USM)

4:30PM
4C.4
Optimization of Thermal Vias for Thermal Resistance in FR-4 PCBs
Alex Lee Yuen Beng, Gan Sik Hong, Mutharasu Devarajan
Universiti Sains Malaysia