Coverage is a metric used to obtain information about execution of hardware description language (HDL) statements. Coverage helps to determine how well the input stimulus verifi ed the design under verifi cation. Coverage directed test generation (CDTG) techniques analyze coverage results and adapt the input stimuli (for verifi cation) generation process to improve the coverage. One of the important components of CDTG technique is the constraint solver. The CDTG constraint solvers requires large amount of memory and time to generate solution. To overcome these limitations we propose a methodology based on consistency algorithm to attain faster coverage. In order to demonstrate the practical effectiveness of the methodology, we used it to test some benchmark constraint satisfaction problems (CSPs), Xbar switch and a floating point unit. The results show an increase in coverage along with a reduction in time required to generate the test cases.