Preliminary Program

Study on Silicon Window Polarity of Partial-SOI LDMOS Power Devices

Yue Hu¹, Hao Wang¹, Cheng Wang¹, Jin He¹, Xiaoan Zhu¹, Sheng Chang², Qijun Huang², Dewen Wang³, Qingxing He⁴, Caixia Du⁴, Shengju Zhong⁴
¹Peking University, ²Wuhan University, ³Shenzhen SI Semiconductors, ⁴Shenzhen Huayue Terascale Chip

Abstract

The Effect of silicon window polarity on partial-SOI (partial silicon-on-insulator, PSOI) LDMOS power devices under high-voltage operation is studied. Different polarities of the silicon window in PSOI LDMOSFETs are analyzed to investigate their effects on electrical characteristics: breakdown voltage (BV) and on-resistance (Ron). In partial-SOI LDMOSFETs, the P-type silicon window is considered as a part of the substrate, while the N-type silicon window falls into the drift region, which affects the high-voltage operation of devices. The two-dimensional (2-D) simulation results show that the breakdown voltage of PSOI LDMOSFET with P-type window is higher than that of PSOI LDMOSFET with N-type window, while the on-resistance of PSOI LDMOSFET with P-type window is lower than that of PSOI LDMOSFET with N-type window.