A New TSV Set Architecture for High Reliability

Jaeseok Park and Sungho Kang
Department of Electrical and Electronic Engineering, Yonsei University


Abstract

Recently, 3D IC design is a very attracting issue, and the importance of system reliability increases. This paper proposes a new reliable and repairable TSV set architecture. The proposed architecture supports the previous TSV repair scheme using TSV redundancies and provides a defect/error detection function reutilizing residual TSV redundancies for high reliability of 3D ICs. This can be applied to both on-line test and soft error detection/analysis. The results show that the proposed TSV set architecture guarantees high TSV redundancy efficiency and reliability. And, the results show that the proposed TSV architecture achieves defect/error coverages which are steady and predictable by a simple formula.