Through-silicon via (TSV) based 3D integrated circuit (IC) testing is promising area to the researchers in modern day semiconductor industry. The manufacturing of 3D ICs may produce TSV defects which reduce yield. Recent work has proposed grouping of regular and redundant TSVs such that the faulty regular TSVs are supported by redundant TSVs and multiplexers (MUXs) are used to implement that group. This paper proposes grouping of regular and redundant TSVs such that a regular TSV is supported by redundant TSVs of other groups. We have presented an algorithm that finds the best grouping of regular and redundant TSVs such that maximum recovery of regular TSVs can be achieved under a given number of MUXs.