Testing for high speed links have been, and will continue to be, primarily based on checking their conformance to the specifications and performance testing due to the lack of industry analog fault models. However, with the increased diversity of features to support new transceiver protocols, specification testing on high speed serial interface (HSSI) is becoming increasingly difficult and costly. Techniques like design-for-testability (DFT) have been applied to overcome some of these challenges. In this paper, the author presents case studies of one of the most common DFT techniques for HSSI testing, namely, external loopback. Firstly, the different flavors of loopback available in industry are briefly mentioned together with their usage. Next, the need for external loopback engagement in HSSI test strategy is described. This is then followed by the explanation of the external loopback circuitry on device-under-test (DUT) card and test methods for supporting HSSI buffer level testing that are implemented on transceiver based FPGA product. This paper also provides summary from silicon experiences and directions for future improvement.