Assumed trustworthy, hardware has been the foundation of all security systems. Against software attacks, a growing number of security solutions have been migrated from software implementation to hardware implementation. However, recent research has revealed a growing vector of hardware attack schemes. The emerging IoT devices are especially susceptible to such hardware attacks due to their widespread deployment which makes physical access to a device easy for an adversary, and their tight resource constraints which limit the security solutions that can be deployed. This tutorial will present an overview on IoT security challenges, including software and network attacks, data exfiltration by testing , side channel analyses and reverse engineering, and system integrity compromise by fault injection, FPGA tampering and hardware Trojan installation. We will further discuss existing and emerging security solutions for system integrity and data confidentiality at minimum cost.
About Bao Liu
Dr. Bao Liu is an assistant professor in the Electrical and Computer Engineering Department at the University of Texas at San Antonio. He received his B.S. and M.S. degrees in Electrical Engineering at Fudan University in 1993 and 1996, and his Ph.D. degree in Computer Science at the University of California San Diego in 2003, respectively. He worked with a couple of industry companies (China IC Design Center, Conexant Systems, Incentia Design Systems, Cadence Design Systems, BlazeDFM, and Tabula), and held a post-doctoral research associate position at the University of California San Diego before joining the ECE department at UTSA. Dr. Liu's research areas include hardware security, nanoscale computing architecture, adaptive and resilient VLSI design, VLSI statistical timing and signal integrity analysis, delay test, and physical design. He has published 18 journal articles, 48 conference papers and 3 PCT/US patents. He has received a Best Paper Award at ICCD in 2005, a Best Research Award in UCSD Research Review in 2002, a China ICCAD Best Member Award in 1996, and a China Mathematics Olympiad Honor in 1988. He has served/been serving as chair/co-chair, TPC member, panel moderator, panelist and reviewer for a number of technical conferences and scientific journals, including chair of the "Hardware and System Security" track at International Symposium on Quality Electronic Design (ISQED) 2015, chair of an invited session "Emerging Nano-Circuits and Systems" at International Midwest Symposium on Circuits and Systems (MWSCAS) 2010, co-chair of the "Emerging Design and Technology" session at International Symposium on Quality Electronic Design (ISQED) 2006 - 2014, moderator for industry panel on "Hardware and System Security" at International Symposium on Quality Electronic Design (ISQED) 2015, and panelist on "CAD for Nanoelectronics" at International Symposium on Nanoscale Architectures (NANOARCH) 2010.
This tutorial will present new circuit and design opportunities offered by emerging Post-CMOS devices including steep slope transistors, ferroelectric transistors, resistive memories and metal-insulator-transition devices. Specifically, the tutorial will provide insight on how to exploit these new devices to design self-powered energy-harvesting systems and brain-inspired vision analytics engines. The tutorial will end with insights into how these new devices and systems are having a transformational impact on our society for continuous health-monitoring and assisting visually-impaired.
About Vijaykrishnan Narayanan
Vijaykrishnan Narayanan is a distinguished professor of computer science and engineering and electrical engineering at The Pennsylvania State University. His research interests are in power-efficient circuits and systems, computer architecture and embedded systems. He is a fellow of IEEE and ACM. He serves as the editor-in-chief of IEEE Transactions on CAD and served as the founding co-editor-in-chief of ACM Journal of Emerging Technologies in Computer Systems.