A Monotonic and Low-Power Digitally Controlled Oscillator Using Standard Cells for SoC Applications

Duo Sheng1,  Ching-Che Chung2,  Jhih-Ci Lan1
1Fu Jen Catholic University, 2National Chung Cheng University


In this paper, a monotonic and low-power digitally controlled oscillator (DCO) with cell-based design for System-On-Chip (SoC) applications is presented. The proposed DCO employs a cascade-stage structure to achieve high resolution and wide range at the same time. Besides, based on the proposed two-level controlled interpolation structure, the proposed DCO can provide monotonic delay with low power consumption and low circuit complexity as compared with conventional approaches. Simulation results show that power consumption of the proposed DCO can be improved to 0.337mW (@1118MHz) with 0.82ps resolution. In addition, the proposed DCO can be implemented with standard cells, making it easily portable to different processes and very suitable for SoC applications.