Gate Driver Circuit Design Optimization for TFT-LCD Panel Manufacturing

Kuo-Fu Lee1,  Yiming Li1,  I-Hsiu Lo1,  Tony Chiang2,  Kuen-Yu Huang2,  Tsau-Hua Hsieh2

1Department of Electrical Engineering, National Chiao Tung University, 2Chimei-InnoLux Corporation


For TFT-LCD panel manufacturing, gate driver circuit with amorphous silicon thin-film transistor (TFT-ASG circuit) plays an important role. In this paper, we propose two different ASG driver circuit topologies to improve crucial dynamic characteristics and then optimize them with circuit sizing by simulation-based evolutionary method which integrates genetic algorithm and circuit simulator on the unified optimization framework [1]. The first circuit consisting of fourteen a-Si:H TFT devices is designed for the specifications of the rise time < 1.5 s, the fall time < 1.5 s and the ripple voltage < 3 V with the minimization of total layout area. The second one with eight a-Si:H TFTs and two capacitors is optimized with the further condition that power dissipation < 2 mW. The optimized results of this study successfully meet the desired specifications and sensitivity analysis of these results shows promising characteristics which could be used for optimal manufacturing of TFT-LCD panel.