Cluster Error Correction and On-Line Repair for Real-Time TSV Array

Tsung-Chu Huang
National Changhua University of Education, Taiwan


Through-silicon vias as high-speed circuit-level real-time channels admit only several levels of logic gates for correcting and repairing within a clock cycle. Unfortunately they are usually arranged as a crowded array for floorplanning and man-ufacturing reasons. To repair cluster faults and correct cluster errors a fast and adaptive architecture is proposed for built-in self-repairing, correcting and monitoring in this paper. The architecture consists of five major modules including a built-in self tester, interleavers, neighbor-shifters, two-dimensional parity-check decoders and an adaptive aging monitor. An LFSR-based noisy channel emulator is developed for verifying the architecture and evaluating the performance in a magnified probabilistic model. A conditional probability based cluster generating model is also developed for analyzing the channel capacity posteriori to the AWGN noise. Evaluations prove that the proposed architecture can test, repair, detect, correct and monitor a large cluster error within a nano-second.