Yuki Tamaki1, Toru Nakura2, Makoto Ikeda1, Kunihiro Asada1
1Dept. of Electronic Engineering and Information Systems, The University of Tokyo, 2VLSI Design and Education Center, The University of Tokyo
We proposed a peak hold circuit which can hold and output the top peak and the bottom peak voltage of the power supply noise. A higher voltage can be sampled by using comparator and two sample and hold circuits. The features of this circuit are, no other power supply and CLK needed, the top and bottom value can be held with one circuit and a mechanism of DC offset cancellation. We can make the noise map by distributing this circuit over the whole chip, and find a hot- spot.