Siqiang Fan1, He Tang2, Hui Zhao2, Albert Wang2, Bin Zhao1, Xin Wang2
1Freescale Semiconductor, 2University of California
A new combined AC/DC-coupled output averaging technique for input amplifier design of flash analog-to-digital converters (ADC) is presented. The new offset averaging design technique takes full advantages of traditional DC-coupled resistance averaging and AC-coupled capacitance averaging techniques to minimize offset-induced ADC nonlinearities. Circuit analysis allows selection of optimum resistance and capacitance averaging factors to achieve maximum offset reduction in ADC designs. The new averaging method was verified in designing a 4bits 1Gs/s flash ADC that was implemented in foundry 0.13m CMOS technology.