The Impact of Electromagnetic Coupling of Guard Ring Metal Lines on the Performance of On-chip Spiral Inductor in Silicon CMOS

Mohd Hafis Mohd Ali1,  Chun-Lee Ler2,  Subhash C. Rustagi2,  Yusman M. Yusof2,  Narain D. Arora2,  Burhanuddin. Y. Majlis3

1Silterra Malaysia, Universiti Kebangsaan Malaysia, Bangi, Malaysia, 2Silterra Malaysia, 3Universiti Kebangsaan Malaysia, Bangi, Malaysia

Abstract

The grounded metal guard rings are useful in isolating the coupling of inductors to other on-chip inductors as well as other components. These guard rings influence the performance of the inductor itself. This paper investigates and analyzes the electromagnetic (EM) coupling of the guard ring to the inductor and investigates its impacts on its performance parameters such as the quality-factor (Q) and effective inductance (Leff). Three inductor test structures surrounded by a grounded metal guard ring with spacing 30μm, 50μm and 80μm from inductor have been fabricated using Silterra CMOS 0.13μm process. Measurement results show that maximum Q (Qmax) degradation can be around 30% compared to the case of inductor without grounded metal guard ring. The measured results are analyzed with the help of EM simulation using Cadence’s Virtuoso Passive Component Designer (VPCD) simulator. The performance degradation curves as a function of guard ring spacing to inductor are reported.