This paper presented a comprehensive analysis and study of the PCB signal via depth effects on SSN for FPGA devices. This paper described the challenges in designing a PCB for a high pin-count package and high-speed signals that necessitated an understanding of mutual inductive coupling. This paper then presented the measurement methodology for the study of the PCB signal via depth effects on SSN. The measurement results show that the SSN caused by mutual inductive coupling is directly proportional to the PCB signal via depth. A current loop increases with signal via depth. Each current loop induces voltage in adjacent loops thereby affecting the SSN at the system level. The results from this study can assist electronic system designers in identifying strategies for reducing and minimizing SSN.