An Automated Approach for the Diagnosis of Multiple Faults in FPGA Interconnects

Nandha Kumar T and Sue Inn Ch'ng
Faculty of Engineering, The University of Nottingham Malaysia Campus, Selangor, Malaysia.


This paper presents a new fine-grain diagnostics technique that is able to locate multiple interconnect faults of an arbitrary design implemented in the FPGA. The proposed methodology uses the concept of remove, reroute and replace technique to automatically diagnose the precise location of the faulty interconnect resources and to self-repair them. In this technique, the net under test (NUT) is removed completely and rerouted using the unused fault-free net, and then the original NUT is replaced segment by segment for testing. The fault models we use are stuck at open, stuck at close and resistive open. The proposed methodology was implemented and tested on the Spartan series FPGAs via an automated approach utilizing parallel port communication. The automation program has been written in PERL and C languages. The experiment results show that approximately 34 faulty resources could be tested per second. Moreover this method uses minimal input output blocks. This proposed technique provides high degree of resolution in exactly locating the multiple interconnect faults and thus provides 100% fault coverage.