Novel Low Delay Slew Rate Control I/Os

Vikas Narang,  Arya B,  Karthik Rajagopal
Texas Instruments, India


As technology is shrinking to sub 100nm, the sensitivity of circuits towards Process, Temperature, Voltage (PTV) and load variations is limiting circuit performance and yield. For example in the specific case of IOs, it is difficult to meet various specifications like the rise and fall times, current drive strength, jitter, power and ground bounce across the wide range of I/O operating condition. Driver circuits are oversized to meet performance goals at slow corners. However, this leads to high current and Simultaneous Switching Noise (SSN) at fast corners. Further, high output edge switching rates lead to EMI issues. In this paper, we propose a technique which can address the EMI and noise concerns without compromising the I/O performance. Our results show that the proposed scheme offers advantage over various PTV compensation schemes which do not target load compensation. The proposed scheme also offers advantage over the traditional slew rate control schemes which target PTV as well as load compensation but require a performance – noise tradeoff.